Intel® Itanium® 2 processors get faster bus architecture

For the first time, Itanium 2 processors have a 667 megahertz (MHz) front side bus (FSB), which connects and transfers data between the microprocessor, chipset and system's main memory.

Servers designed to utilize the new bus are expected to deliver more than 65 percent greater system bandwidth over servers designed with current Itanium 2 processors with a 400 MHz FSB.
This new capability will help set the stage for the forthcoming dual core Itanium processor, codenamed "Montecito," which will feature the same bus architecture.

"Intel continues to bring new capabilities to the Itanium architecture, evolving the platform to further improve performance for data intensive tasks," said Samir Al-Schamma, Intel's general manager for the GCC. "Looking forward, we are coming up on the next major milestone for the Itanium processor family - dual-core server platforms based on Montecito.

We are extremely excited about the customer and industry feedback we are getting, and the preliminary performance results we are seeing on Montecito-based systems will further expand Itanium's leadership in its targeted market segments." Itanium-based servers continue to make strides in three target market segments: RISC replacement, mainframe migration and high-performance computing.

Today, more than 40 percent of the Global 100 corporations have deployed Itanium-based servers and 79 of the TOP500 list of the world's fastest super computers are powered by Itanium processors. The ecosystem continues to grow with more than 3,600 applications available, while eight of nine RISC vendors and six of seven mainframe vendors sell mainframe-class Itanium-based servers.

The improved front side bus bandwidth allows for 10.6 gigabytes of data per second to pass from the processor to other system components. In contrast, the current generation 400 MHz FSB transfers 6.4 gigabytes of data per second. The ability to move more data in a very short period of time is critical to compute intensive applications in the scientific, oil and gas and government industries.

Hitachi, which will adopt the new Itanium 2 processors with the 667 FSB into new Hitachi BladeSymphony* servers coming in the next 30 days, has also designed a chipset (the communications controller between the processor and the rest of the computer system) to take advantage of the new bus architecture.

Platforms using Montecito are expected to deliver up to twice the performance, up to three times the system bandwidth, and more than 2 1/2 times as much on-die cache as the current generation of Itanium processors. While boosting performance, Montecito is expected to also deliver more than 20 percent lower power than previous generations of Itanium processors due to new technologies for power management.

Montecito will also have Intel® Hyper-Threading technology, enabling four times the threads as the current generation. The Intel Itanium 2 processor at 1.66 GHz with 9 MB of cache with 667 FSB is available in 1,000-unit quantities.
The Intel Itanium 2 processor at 1.66 GHz with 6 MB with 667 FSB of cache will also be in 1,000-unit quantities.