DSO Nanometer workshop concludes

Held at the Le Royal Meridian, the workshop drew a number of professors, CEO's and senior managers in the field of nano technology from all over the globe.

His Highness Sheikh Ahmed Bin Saeed Al Maktoum, is the chairman of DSO and the workshop was held under his patronage. The workshop also had a number of firsts to its credit - it was the first workshop on this topic in the Gulf region and the first one to be held by DSO on such a large scale.

The workshop focused on challenges and issues associated with nanometer technology covering Integrated Circuit (IC) design, Electronic Design Automation (EDA) software tools, Intellectual Property (IP), semiconductor processing and manufacturing and the educational challenges facing these technologies.

The speakers on the final day of the workshop included Tim Holden, Director of EDA Relations, ARM Ltd, UK, who spoke on Powering the Digital Lifestyle: 'Electronic applications have become common place in just about every aspect of the modern world. Mobile communication is, today, a reality that is taken for granted by hundreds of millions of people who back in the early 1980's would only have seen such phenomena in science fiction films or advanced research papers. Communication, home entertainment, industrial manufacturing, share trading, farming, transport and even artificial limbs have been enhanced by digital electronics.'

Rich Goldman, VP, Strategic Alliances, Synopsys, was the next in line to speak about IP is Key to Address Consumer Driven Nanometer Design Challenges. 'As the growing global middle class is driving the convergence of computation, connectivity and consumer-centric products, they are also pressuring the market for lower prices. The technology and size of the SoCs required to serve this demand introduces incredible complexity,' said Goldman.

Dr. Kholdoun Torki, Technical Director, CMP, in Grenoble, France presented his speech on Enabling the Nanometer IC Design and Fabrication.
'The access to nanometer integrated circuits processes is challenging today. CAD, design-kits, design methodologies, fabrication cost and testing are more crucial and challenging. The access to these capabilities is only possible through an infrastructure dedicated to give the service and support, making possible the development and production of advanced integrated circuits applications. CMP is a service organization offering the fabrication of integrated circuits and MEMS, for prototyping and low volume productions,' said Dr. Torki.

Dr Ali Iranmanesh, Chairman and CEO, Silicon Valley Technical Institute presented his talk on Educating the Nanometer Generation: 'Over the past several decades, advances in semiconductor technology and manufacturing, combined with a relentless device-scaling trend have resulted in a phenomenal increase in the transistor count per chip.'

Dr Ali Iranmanesh, Chairman and CEO, Silicon Valley Technical Institute presented his talk on Educating the Nanometer Generation: 'Over the past several decades, advances in semiconductor technology and manufacturing, combined with a relentless device-scaling trend have resulted in a phenomenal increase in the transistor count per chip.'

The workshop was rounded off with a panel discussion on Nanometer Design Challenges: The Good, The Bad, The Ugly, and was moderated by Dr. Eesa Bastaki, Director, Technology & Development, DSO.

Dr Jurgen Knorr (DSO); Jamil Kawa (SNPS); Clive Watts & Tim Holden (ARM); Rich Goldman (SNPS); Dr. Ali Iranmanesh (SVTI); Kholdoun Torki (CMP) and Dr Roberto Zafalon (ST) participated in the discussion.